Source file src/cmd/compile/internal/ssa/rewritePPC64latelower.go

     1  // Code generated from _gen/PPC64latelower.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package ssa
     4  
     5  import "internal/buildcfg"
     6  
     7  func rewriteValuePPC64latelower(v *Value) bool {
     8  	switch v.Op {
     9  	case OpPPC64ADD:
    10  		return rewriteValuePPC64latelower_OpPPC64ADD(v)
    11  	case OpPPC64AND:
    12  		return rewriteValuePPC64latelower_OpPPC64AND(v)
    13  	case OpPPC64ANDconst:
    14  		return rewriteValuePPC64latelower_OpPPC64ANDconst(v)
    15  	case OpPPC64CMPconst:
    16  		return rewriteValuePPC64latelower_OpPPC64CMPconst(v)
    17  	case OpPPC64ISEL:
    18  		return rewriteValuePPC64latelower_OpPPC64ISEL(v)
    19  	case OpPPC64RLDICL:
    20  		return rewriteValuePPC64latelower_OpPPC64RLDICL(v)
    21  	case OpPPC64RLDICLCC:
    22  		return rewriteValuePPC64latelower_OpPPC64RLDICLCC(v)
    23  	case OpPPC64SETBC:
    24  		return rewriteValuePPC64latelower_OpPPC64SETBC(v)
    25  	case OpPPC64SETBCR:
    26  		return rewriteValuePPC64latelower_OpPPC64SETBCR(v)
    27  	}
    28  	return false
    29  }
    30  func rewriteValuePPC64latelower_OpPPC64ADD(v *Value) bool {
    31  	v_1 := v.Args[1]
    32  	v_0 := v.Args[0]
    33  	// match: (ADD (MOVDconst [m]) x)
    34  	// cond: supportsPPC64PCRel() && (m<<30)>>30 == m
    35  	// result: (ADDconst [m] x)
    36  	for {
    37  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    38  			if v_0.Op != OpPPC64MOVDconst {
    39  				continue
    40  			}
    41  			m := auxIntToInt64(v_0.AuxInt)
    42  			x := v_1
    43  			if !(supportsPPC64PCRel() && (m<<30)>>30 == m) {
    44  				continue
    45  			}
    46  			v.reset(OpPPC64ADDconst)
    47  			v.AuxInt = int64ToAuxInt(m)
    48  			v.AddArg(x)
    49  			return true
    50  		}
    51  		break
    52  	}
    53  	return false
    54  }
    55  func rewriteValuePPC64latelower_OpPPC64AND(v *Value) bool {
    56  	v_1 := v.Args[1]
    57  	v_0 := v.Args[0]
    58  	// match: (AND x:(MOVDconst [m]) n)
    59  	// cond: isPPC64ValidShiftMask(m)
    60  	// result: (RLDICL [encodePPC64RotateMask(0,m,64)] n)
    61  	for {
    62  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    63  			x := v_0
    64  			if x.Op != OpPPC64MOVDconst {
    65  				continue
    66  			}
    67  			m := auxIntToInt64(x.AuxInt)
    68  			n := v_1
    69  			if !(isPPC64ValidShiftMask(m)) {
    70  				continue
    71  			}
    72  			v.reset(OpPPC64RLDICL)
    73  			v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 64))
    74  			v.AddArg(n)
    75  			return true
    76  		}
    77  		break
    78  	}
    79  	// match: (AND x:(MOVDconst [m]) n)
    80  	// cond: m != 0 && isPPC64ValidShiftMask(^m)
    81  	// result: (RLDICR [encodePPC64RotateMask(0,m,64)] n)
    82  	for {
    83  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    84  			x := v_0
    85  			if x.Op != OpPPC64MOVDconst {
    86  				continue
    87  			}
    88  			m := auxIntToInt64(x.AuxInt)
    89  			n := v_1
    90  			if !(m != 0 && isPPC64ValidShiftMask(^m)) {
    91  				continue
    92  			}
    93  			v.reset(OpPPC64RLDICR)
    94  			v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 64))
    95  			v.AddArg(n)
    96  			return true
    97  		}
    98  		break
    99  	}
   100  	// match: (AND <t> x:(MOVDconst [m]) n)
   101  	// cond: t.Size() == 4 && isPPC64WordRotateMask(m)
   102  	// result: (RLWINM [encodePPC64RotateMask(0,m,32)] n)
   103  	for {
   104  		t := v.Type
   105  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
   106  			x := v_0
   107  			if x.Op != OpPPC64MOVDconst {
   108  				continue
   109  			}
   110  			m := auxIntToInt64(x.AuxInt)
   111  			n := v_1
   112  			if !(t.Size() == 4 && isPPC64WordRotateMask(m)) {
   113  				continue
   114  			}
   115  			v.reset(OpPPC64RLWINM)
   116  			v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 32))
   117  			v.AddArg(n)
   118  			return true
   119  		}
   120  		break
   121  	}
   122  	return false
   123  }
   124  func rewriteValuePPC64latelower_OpPPC64ANDconst(v *Value) bool {
   125  	v_0 := v.Args[0]
   126  	// match: (ANDconst [m] x)
   127  	// cond: isPPC64ValidShiftMask(m)
   128  	// result: (RLDICL [encodePPC64RotateMask(0,m,64)] x)
   129  	for {
   130  		m := auxIntToInt64(v.AuxInt)
   131  		x := v_0
   132  		if !(isPPC64ValidShiftMask(m)) {
   133  			break
   134  		}
   135  		v.reset(OpPPC64RLDICL)
   136  		v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 64))
   137  		v.AddArg(x)
   138  		return true
   139  	}
   140  	return false
   141  }
   142  func rewriteValuePPC64latelower_OpPPC64CMPconst(v *Value) bool {
   143  	v_0 := v.Args[0]
   144  	// match: (CMPconst [0] z:(ADD x y))
   145  	// cond: v.Block == z.Block
   146  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   147  	for {
   148  		if auxIntToInt64(v.AuxInt) != 0 {
   149  			break
   150  		}
   151  		z := v_0
   152  		if z.Op != OpPPC64ADD {
   153  			break
   154  		}
   155  		if !(v.Block == z.Block) {
   156  			break
   157  		}
   158  		v.reset(OpPPC64CMPconst)
   159  		v.AuxInt = int64ToAuxInt(0)
   160  		v.AddArg(convertPPC64OpToOpCC(z))
   161  		return true
   162  	}
   163  	// match: (CMPconst [0] z:(AND x y))
   164  	// cond: v.Block == z.Block
   165  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   166  	for {
   167  		if auxIntToInt64(v.AuxInt) != 0 {
   168  			break
   169  		}
   170  		z := v_0
   171  		if z.Op != OpPPC64AND {
   172  			break
   173  		}
   174  		if !(v.Block == z.Block) {
   175  			break
   176  		}
   177  		v.reset(OpPPC64CMPconst)
   178  		v.AuxInt = int64ToAuxInt(0)
   179  		v.AddArg(convertPPC64OpToOpCC(z))
   180  		return true
   181  	}
   182  	// match: (CMPconst [0] z:(ANDN x y))
   183  	// cond: v.Block == z.Block
   184  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   185  	for {
   186  		if auxIntToInt64(v.AuxInt) != 0 {
   187  			break
   188  		}
   189  		z := v_0
   190  		if z.Op != OpPPC64ANDN {
   191  			break
   192  		}
   193  		if !(v.Block == z.Block) {
   194  			break
   195  		}
   196  		v.reset(OpPPC64CMPconst)
   197  		v.AuxInt = int64ToAuxInt(0)
   198  		v.AddArg(convertPPC64OpToOpCC(z))
   199  		return true
   200  	}
   201  	// match: (CMPconst [0] z:(OR x y))
   202  	// cond: v.Block == z.Block
   203  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   204  	for {
   205  		if auxIntToInt64(v.AuxInt) != 0 {
   206  			break
   207  		}
   208  		z := v_0
   209  		if z.Op != OpPPC64OR {
   210  			break
   211  		}
   212  		if !(v.Block == z.Block) {
   213  			break
   214  		}
   215  		v.reset(OpPPC64CMPconst)
   216  		v.AuxInt = int64ToAuxInt(0)
   217  		v.AddArg(convertPPC64OpToOpCC(z))
   218  		return true
   219  	}
   220  	// match: (CMPconst [0] z:(SUB x y))
   221  	// cond: v.Block == z.Block
   222  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   223  	for {
   224  		if auxIntToInt64(v.AuxInt) != 0 {
   225  			break
   226  		}
   227  		z := v_0
   228  		if z.Op != OpPPC64SUB {
   229  			break
   230  		}
   231  		if !(v.Block == z.Block) {
   232  			break
   233  		}
   234  		v.reset(OpPPC64CMPconst)
   235  		v.AuxInt = int64ToAuxInt(0)
   236  		v.AddArg(convertPPC64OpToOpCC(z))
   237  		return true
   238  	}
   239  	// match: (CMPconst [0] z:(NOR x y))
   240  	// cond: v.Block == z.Block
   241  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   242  	for {
   243  		if auxIntToInt64(v.AuxInt) != 0 {
   244  			break
   245  		}
   246  		z := v_0
   247  		if z.Op != OpPPC64NOR {
   248  			break
   249  		}
   250  		if !(v.Block == z.Block) {
   251  			break
   252  		}
   253  		v.reset(OpPPC64CMPconst)
   254  		v.AuxInt = int64ToAuxInt(0)
   255  		v.AddArg(convertPPC64OpToOpCC(z))
   256  		return true
   257  	}
   258  	// match: (CMPconst [0] z:(XOR x y))
   259  	// cond: v.Block == z.Block
   260  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   261  	for {
   262  		if auxIntToInt64(v.AuxInt) != 0 {
   263  			break
   264  		}
   265  		z := v_0
   266  		if z.Op != OpPPC64XOR {
   267  			break
   268  		}
   269  		if !(v.Block == z.Block) {
   270  			break
   271  		}
   272  		v.reset(OpPPC64CMPconst)
   273  		v.AuxInt = int64ToAuxInt(0)
   274  		v.AddArg(convertPPC64OpToOpCC(z))
   275  		return true
   276  	}
   277  	// match: (CMPconst [0] z:(MULHDU x y))
   278  	// cond: v.Block == z.Block
   279  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   280  	for {
   281  		if auxIntToInt64(v.AuxInt) != 0 {
   282  			break
   283  		}
   284  		z := v_0
   285  		if z.Op != OpPPC64MULHDU {
   286  			break
   287  		}
   288  		if !(v.Block == z.Block) {
   289  			break
   290  		}
   291  		v.reset(OpPPC64CMPconst)
   292  		v.AuxInt = int64ToAuxInt(0)
   293  		v.AddArg(convertPPC64OpToOpCC(z))
   294  		return true
   295  	}
   296  	// match: (CMPconst [0] z:(NEG x))
   297  	// cond: v.Block == z.Block
   298  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   299  	for {
   300  		if auxIntToInt64(v.AuxInt) != 0 {
   301  			break
   302  		}
   303  		z := v_0
   304  		if z.Op != OpPPC64NEG {
   305  			break
   306  		}
   307  		if !(v.Block == z.Block) {
   308  			break
   309  		}
   310  		v.reset(OpPPC64CMPconst)
   311  		v.AuxInt = int64ToAuxInt(0)
   312  		v.AddArg(convertPPC64OpToOpCC(z))
   313  		return true
   314  	}
   315  	// match: (CMPconst [0] z:(CNTLZD x))
   316  	// cond: v.Block == z.Block
   317  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   318  	for {
   319  		if auxIntToInt64(v.AuxInt) != 0 {
   320  			break
   321  		}
   322  		z := v_0
   323  		if z.Op != OpPPC64CNTLZD {
   324  			break
   325  		}
   326  		if !(v.Block == z.Block) {
   327  			break
   328  		}
   329  		v.reset(OpPPC64CMPconst)
   330  		v.AuxInt = int64ToAuxInt(0)
   331  		v.AddArg(convertPPC64OpToOpCC(z))
   332  		return true
   333  	}
   334  	// match: (CMPconst [0] z:(RLDICL x))
   335  	// cond: v.Block == z.Block
   336  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   337  	for {
   338  		if auxIntToInt64(v.AuxInt) != 0 {
   339  			break
   340  		}
   341  		z := v_0
   342  		if z.Op != OpPPC64RLDICL {
   343  			break
   344  		}
   345  		if !(v.Block == z.Block) {
   346  			break
   347  		}
   348  		v.reset(OpPPC64CMPconst)
   349  		v.AuxInt = int64ToAuxInt(0)
   350  		v.AddArg(convertPPC64OpToOpCC(z))
   351  		return true
   352  	}
   353  	// match: (CMPconst [0] z:(ADDconst [c] x))
   354  	// cond: int64(int16(c)) == c && v.Block == z.Block
   355  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   356  	for {
   357  		if auxIntToInt64(v.AuxInt) != 0 {
   358  			break
   359  		}
   360  		z := v_0
   361  		if z.Op != OpPPC64ADDconst {
   362  			break
   363  		}
   364  		c := auxIntToInt64(z.AuxInt)
   365  		if !(int64(int16(c)) == c && v.Block == z.Block) {
   366  			break
   367  		}
   368  		v.reset(OpPPC64CMPconst)
   369  		v.AuxInt = int64ToAuxInt(0)
   370  		v.AddArg(convertPPC64OpToOpCC(z))
   371  		return true
   372  	}
   373  	// match: (CMPconst [0] z:(ANDconst [c] x))
   374  	// cond: int64(uint16(c)) == c && v.Block == z.Block
   375  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   376  	for {
   377  		if auxIntToInt64(v.AuxInt) != 0 {
   378  			break
   379  		}
   380  		z := v_0
   381  		if z.Op != OpPPC64ANDconst {
   382  			break
   383  		}
   384  		c := auxIntToInt64(z.AuxInt)
   385  		if !(int64(uint16(c)) == c && v.Block == z.Block) {
   386  			break
   387  		}
   388  		v.reset(OpPPC64CMPconst)
   389  		v.AuxInt = int64ToAuxInt(0)
   390  		v.AddArg(convertPPC64OpToOpCC(z))
   391  		return true
   392  	}
   393  	// match: (CMPconst <t> [0] (Select0 z:(ADDCC x y)))
   394  	// result: (Select1 <t> z)
   395  	for {
   396  		t := v.Type
   397  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   398  			break
   399  		}
   400  		z := v_0.Args[0]
   401  		if z.Op != OpPPC64ADDCC {
   402  			break
   403  		}
   404  		v.reset(OpSelect1)
   405  		v.Type = t
   406  		v.AddArg(z)
   407  		return true
   408  	}
   409  	// match: (CMPconst <t> [0] (Select0 z:(ANDCC x y)))
   410  	// result: (Select1 <t> z)
   411  	for {
   412  		t := v.Type
   413  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   414  			break
   415  		}
   416  		z := v_0.Args[0]
   417  		if z.Op != OpPPC64ANDCC {
   418  			break
   419  		}
   420  		v.reset(OpSelect1)
   421  		v.Type = t
   422  		v.AddArg(z)
   423  		return true
   424  	}
   425  	// match: (CMPconst <t> [0] (Select0 z:(ANDNCC x y)))
   426  	// result: (Select1 <t> z)
   427  	for {
   428  		t := v.Type
   429  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   430  			break
   431  		}
   432  		z := v_0.Args[0]
   433  		if z.Op != OpPPC64ANDNCC {
   434  			break
   435  		}
   436  		v.reset(OpSelect1)
   437  		v.Type = t
   438  		v.AddArg(z)
   439  		return true
   440  	}
   441  	// match: (CMPconst <t> [0] (Select0 z:(ORCC x y)))
   442  	// result: (Select1 <t> z)
   443  	for {
   444  		t := v.Type
   445  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   446  			break
   447  		}
   448  		z := v_0.Args[0]
   449  		if z.Op != OpPPC64ORCC {
   450  			break
   451  		}
   452  		v.reset(OpSelect1)
   453  		v.Type = t
   454  		v.AddArg(z)
   455  		return true
   456  	}
   457  	// match: (CMPconst <t> [0] (Select0 z:(SUBCC x y)))
   458  	// result: (Select1 <t> z)
   459  	for {
   460  		t := v.Type
   461  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   462  			break
   463  		}
   464  		z := v_0.Args[0]
   465  		if z.Op != OpPPC64SUBCC {
   466  			break
   467  		}
   468  		v.reset(OpSelect1)
   469  		v.Type = t
   470  		v.AddArg(z)
   471  		return true
   472  	}
   473  	// match: (CMPconst <t> [0] (Select0 z:(NORCC x y)))
   474  	// result: (Select1 <t> z)
   475  	for {
   476  		t := v.Type
   477  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   478  			break
   479  		}
   480  		z := v_0.Args[0]
   481  		if z.Op != OpPPC64NORCC {
   482  			break
   483  		}
   484  		v.reset(OpSelect1)
   485  		v.Type = t
   486  		v.AddArg(z)
   487  		return true
   488  	}
   489  	// match: (CMPconst <t> [0] (Select0 z:(XORCC x y)))
   490  	// result: (Select1 <t> z)
   491  	for {
   492  		t := v.Type
   493  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   494  			break
   495  		}
   496  		z := v_0.Args[0]
   497  		if z.Op != OpPPC64XORCC {
   498  			break
   499  		}
   500  		v.reset(OpSelect1)
   501  		v.Type = t
   502  		v.AddArg(z)
   503  		return true
   504  	}
   505  	// match: (CMPconst <t> [0] (Select0 z:(MULHDUCC x y)))
   506  	// result: (Select1 <t> z)
   507  	for {
   508  		t := v.Type
   509  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   510  			break
   511  		}
   512  		z := v_0.Args[0]
   513  		if z.Op != OpPPC64MULHDUCC {
   514  			break
   515  		}
   516  		v.reset(OpSelect1)
   517  		v.Type = t
   518  		v.AddArg(z)
   519  		return true
   520  	}
   521  	// match: (CMPconst <t> [0] (Select0 z:(ADDCCconst y)))
   522  	// result: (Select1 <t> z)
   523  	for {
   524  		t := v.Type
   525  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   526  			break
   527  		}
   528  		z := v_0.Args[0]
   529  		if z.Op != OpPPC64ADDCCconst {
   530  			break
   531  		}
   532  		v.reset(OpSelect1)
   533  		v.Type = t
   534  		v.AddArg(z)
   535  		return true
   536  	}
   537  	// match: (CMPconst <t> [0] (Select0 z:(ANDCCconst y)))
   538  	// result: (Select1 <t> z)
   539  	for {
   540  		t := v.Type
   541  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   542  			break
   543  		}
   544  		z := v_0.Args[0]
   545  		if z.Op != OpPPC64ANDCCconst {
   546  			break
   547  		}
   548  		v.reset(OpSelect1)
   549  		v.Type = t
   550  		v.AddArg(z)
   551  		return true
   552  	}
   553  	// match: (CMPconst <t> [0] (Select0 z:(NEGCC y)))
   554  	// result: (Select1 <t> z)
   555  	for {
   556  		t := v.Type
   557  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   558  			break
   559  		}
   560  		z := v_0.Args[0]
   561  		if z.Op != OpPPC64NEGCC {
   562  			break
   563  		}
   564  		v.reset(OpSelect1)
   565  		v.Type = t
   566  		v.AddArg(z)
   567  		return true
   568  	}
   569  	// match: (CMPconst <t> [0] (Select0 z:(CNTLZDCC y)))
   570  	// result: (Select1 <t> z)
   571  	for {
   572  		t := v.Type
   573  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   574  			break
   575  		}
   576  		z := v_0.Args[0]
   577  		if z.Op != OpPPC64CNTLZDCC {
   578  			break
   579  		}
   580  		v.reset(OpSelect1)
   581  		v.Type = t
   582  		v.AddArg(z)
   583  		return true
   584  	}
   585  	// match: (CMPconst <t> [0] (Select0 z:(RLDICLCC y)))
   586  	// result: (Select1 <t> z)
   587  	for {
   588  		t := v.Type
   589  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   590  			break
   591  		}
   592  		z := v_0.Args[0]
   593  		if z.Op != OpPPC64RLDICLCC {
   594  			break
   595  		}
   596  		v.reset(OpSelect1)
   597  		v.Type = t
   598  		v.AddArg(z)
   599  		return true
   600  	}
   601  	return false
   602  }
   603  func rewriteValuePPC64latelower_OpPPC64ISEL(v *Value) bool {
   604  	v_2 := v.Args[2]
   605  	v_1 := v.Args[1]
   606  	v_0 := v.Args[0]
   607  	// match: (ISEL [a] x (MOVDconst [0]) z)
   608  	// result: (ISELZ [a] x z)
   609  	for {
   610  		a := auxIntToInt32(v.AuxInt)
   611  		x := v_0
   612  		if v_1.Op != OpPPC64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
   613  			break
   614  		}
   615  		z := v_2
   616  		v.reset(OpPPC64ISELZ)
   617  		v.AuxInt = int32ToAuxInt(a)
   618  		v.AddArg2(x, z)
   619  		return true
   620  	}
   621  	// match: (ISEL [a] (MOVDconst [0]) y z)
   622  	// result: (ISELZ [a^0x4] y z)
   623  	for {
   624  		a := auxIntToInt32(v.AuxInt)
   625  		if v_0.Op != OpPPC64MOVDconst || auxIntToInt64(v_0.AuxInt) != 0 {
   626  			break
   627  		}
   628  		y := v_1
   629  		z := v_2
   630  		v.reset(OpPPC64ISELZ)
   631  		v.AuxInt = int32ToAuxInt(a ^ 0x4)
   632  		v.AddArg2(y, z)
   633  		return true
   634  	}
   635  	return false
   636  }
   637  func rewriteValuePPC64latelower_OpPPC64RLDICL(v *Value) bool {
   638  	v_0 := v.Args[0]
   639  	// match: (RLDICL [em] x:(SRDconst [s] a))
   640  	// cond: (em&0xFF0000) == 0
   641  	// result: (RLDICL [mergePPC64RLDICLandSRDconst(em, s)] a)
   642  	for {
   643  		em := auxIntToInt64(v.AuxInt)
   644  		x := v_0
   645  		if x.Op != OpPPC64SRDconst {
   646  			break
   647  		}
   648  		s := auxIntToInt64(x.AuxInt)
   649  		a := x.Args[0]
   650  		if !((em & 0xFF0000) == 0) {
   651  			break
   652  		}
   653  		v.reset(OpPPC64RLDICL)
   654  		v.AuxInt = int64ToAuxInt(mergePPC64RLDICLandSRDconst(em, s))
   655  		v.AddArg(a)
   656  		return true
   657  	}
   658  	return false
   659  }
   660  func rewriteValuePPC64latelower_OpPPC64RLDICLCC(v *Value) bool {
   661  	v_0 := v.Args[0]
   662  	// match: (RLDICLCC [a] x)
   663  	// cond: convertPPC64RldiclAndccconst(a) != 0
   664  	// result: (ANDCCconst [convertPPC64RldiclAndccconst(a)] x)
   665  	for {
   666  		a := auxIntToInt64(v.AuxInt)
   667  		x := v_0
   668  		if !(convertPPC64RldiclAndccconst(a) != 0) {
   669  			break
   670  		}
   671  		v.reset(OpPPC64ANDCCconst)
   672  		v.AuxInt = int64ToAuxInt(convertPPC64RldiclAndccconst(a))
   673  		v.AddArg(x)
   674  		return true
   675  	}
   676  	return false
   677  }
   678  func rewriteValuePPC64latelower_OpPPC64SETBC(v *Value) bool {
   679  	v_0 := v.Args[0]
   680  	b := v.Block
   681  	typ := &b.Func.Config.Types
   682  	// match: (SETBC [2] cmp)
   683  	// cond: buildcfg.GOPPC64 <= 9
   684  	// result: (ISELZ [2] (MOVDconst [1]) cmp)
   685  	for {
   686  		if auxIntToInt32(v.AuxInt) != 2 {
   687  			break
   688  		}
   689  		cmp := v_0
   690  		if !(buildcfg.GOPPC64 <= 9) {
   691  			break
   692  		}
   693  		v.reset(OpPPC64ISELZ)
   694  		v.AuxInt = int32ToAuxInt(2)
   695  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   696  		v0.AuxInt = int64ToAuxInt(1)
   697  		v.AddArg2(v0, cmp)
   698  		return true
   699  	}
   700  	// match: (SETBC [0] cmp)
   701  	// cond: buildcfg.GOPPC64 <= 9
   702  	// result: (ISELZ [0] (MOVDconst [1]) cmp)
   703  	for {
   704  		if auxIntToInt32(v.AuxInt) != 0 {
   705  			break
   706  		}
   707  		cmp := v_0
   708  		if !(buildcfg.GOPPC64 <= 9) {
   709  			break
   710  		}
   711  		v.reset(OpPPC64ISELZ)
   712  		v.AuxInt = int32ToAuxInt(0)
   713  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   714  		v0.AuxInt = int64ToAuxInt(1)
   715  		v.AddArg2(v0, cmp)
   716  		return true
   717  	}
   718  	// match: (SETBC [1] cmp)
   719  	// cond: buildcfg.GOPPC64 <= 9
   720  	// result: (ISELZ [1] (MOVDconst [1]) cmp)
   721  	for {
   722  		if auxIntToInt32(v.AuxInt) != 1 {
   723  			break
   724  		}
   725  		cmp := v_0
   726  		if !(buildcfg.GOPPC64 <= 9) {
   727  			break
   728  		}
   729  		v.reset(OpPPC64ISELZ)
   730  		v.AuxInt = int32ToAuxInt(1)
   731  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   732  		v0.AuxInt = int64ToAuxInt(1)
   733  		v.AddArg2(v0, cmp)
   734  		return true
   735  	}
   736  	return false
   737  }
   738  func rewriteValuePPC64latelower_OpPPC64SETBCR(v *Value) bool {
   739  	v_0 := v.Args[0]
   740  	b := v.Block
   741  	typ := &b.Func.Config.Types
   742  	// match: (SETBCR [2] cmp)
   743  	// cond: buildcfg.GOPPC64 <= 9
   744  	// result: (ISELZ [6] (MOVDconst [1]) cmp)
   745  	for {
   746  		if auxIntToInt32(v.AuxInt) != 2 {
   747  			break
   748  		}
   749  		cmp := v_0
   750  		if !(buildcfg.GOPPC64 <= 9) {
   751  			break
   752  		}
   753  		v.reset(OpPPC64ISELZ)
   754  		v.AuxInt = int32ToAuxInt(6)
   755  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   756  		v0.AuxInt = int64ToAuxInt(1)
   757  		v.AddArg2(v0, cmp)
   758  		return true
   759  	}
   760  	// match: (SETBCR [0] cmp)
   761  	// cond: buildcfg.GOPPC64 <= 9
   762  	// result: (ISELZ [4] (MOVDconst [1]) cmp)
   763  	for {
   764  		if auxIntToInt32(v.AuxInt) != 0 {
   765  			break
   766  		}
   767  		cmp := v_0
   768  		if !(buildcfg.GOPPC64 <= 9) {
   769  			break
   770  		}
   771  		v.reset(OpPPC64ISELZ)
   772  		v.AuxInt = int32ToAuxInt(4)
   773  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   774  		v0.AuxInt = int64ToAuxInt(1)
   775  		v.AddArg2(v0, cmp)
   776  		return true
   777  	}
   778  	// match: (SETBCR [1] cmp)
   779  	// cond: buildcfg.GOPPC64 <= 9
   780  	// result: (ISELZ [5] (MOVDconst [1]) cmp)
   781  	for {
   782  		if auxIntToInt32(v.AuxInt) != 1 {
   783  			break
   784  		}
   785  		cmp := v_0
   786  		if !(buildcfg.GOPPC64 <= 9) {
   787  			break
   788  		}
   789  		v.reset(OpPPC64ISELZ)
   790  		v.AuxInt = int32ToAuxInt(5)
   791  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   792  		v0.AuxInt = int64ToAuxInt(1)
   793  		v.AddArg2(v0, cmp)
   794  		return true
   795  	}
   796  	return false
   797  }
   798  func rewriteBlockPPC64latelower(b *Block) bool {
   799  	return false
   800  }
   801  

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